ECWC 2014: The Embedded Technology Session


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The result was a process by which the customer’s design requirements for electrical insulation, inductor, and electromagnetic loss had been satisfied, and which demonstrated a practicable route for the manufacture of embedded magnetic products.

From embedded inductors to the effects of parasitic inductance in external decoupling capacitors on power supply quality. Masamitsu Yoshizawa from Noda Screen Company explained how thin-film decoupling capacitors embedded in organic interposers could achieve better noise reduction than PCB-mounted ceramic chip capacitors and effectively act as if they were on the chip itself, but without taking-up space on the silicon. He described a patented process for manufacturing stable thin-film strontium titanate capacitors by aerosol chemical vapour deposition at atmospheric pressure, with the advantages of flexibility in size, shape, and location.

Capacitors could be located very close to LSI pads, with optimised electrode positions. He reviewed the observed differences in characteristic performance between on-chip and on-PCB decoupling capacitors, believed to be related to the very low inductance between IC and embedded capacitor. Further studies to gain a more precise understanding of IC internal noise were being carried out in cooperation with the University of Tokyo.

The final paper of the session was presented by Jürgen Wolf form Wűrth Elektronik, reporting the outcome of a government-funded collaborative research project on ultra-thin silicon chips in flexible microsystems, which had many potential applications in medical electronics, wearable electronics, and automotive electronics. A growing demand for mechanically-flexible electronic systems and increasing levels of integration had led to the development of hybrid build-ups combining polymer substrates and ultra-thin silicon chips which could maintain their functionality under bent conditions.

Wolf described a proprietary process for wafer-scale fabrication and subsequent “pick, crack, and place” singularisation and handling of integrated circuits less than 20 microns in thickness, and explained their physical characteristics. He went on to detail methods of mechanically and electrically connecting them to flexible substrates, and discussed design issues such as the influence of piezoresistive effects and the layer- and structure-dependent management of mechanical stress. Several build-up techniques for embedding ultra-thin chips into flexible polymer substrates had been realised and characterised, and the technology represented another step in the evolution of flexible printed circuit assemblies.

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